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1

[IEEE 2019 IEEE International Symposium on Circuits and Systems (ISCAS) - Sapporo, Japan (2019.5.26-2019.5.29)] 2019 IEEE International Symposium on Circuits and Systems (ISCAS) - Design of Low-Cost Ground Penetrating Radar Receiving Circuit Based on Equivalent Sampling

Cai, Zhikuang, Lin, Wenhua, Qi, Xuanchen, Xiao, Jian

Année:

2019

Fichier:

PDF, 569 KB

2019

2

A 2.4 GHz 2.9 mW Zigbee RF Receiver with Current-Reusing and Function-Reused Mixing Techniques

Cai, Zhikuang, Shi, Mingmin, Hu, Shanwen, Wang, Zixuan

Journal:

Année:

2020

Fichier:

PDF, 4.32 MB

2020

3

A 0.2–6 GHz linearized Darlington-cascode broadband power amplifier

Hu, Shanwen, Yu, Shu, Hu, Yunqing, Wang, Zixuan, Zhou, Bo, Cai, Zhikuang, Guo, Yufeng

Journal:

IEICE Electronics Express

Année:

2018

Langue:

english

Fichier:

PDF, 2.94 MB

english, 2018

4

[IEEE 2018 Cross Strait Quad-Regional Radio Science and Wireless Technology Conference (CSQRWC) - Xuzhou (2018.7.21-2018.7.24)] 2018 Cross Strait Quad-Regional Radio Science and Wireless Technology Conference (CSQRWC) - Broadband Lumped-Element Quadrature Hybrid For Intermediate Frequency Applications

Wang, Qipeng, He, Sijie, Zhu, Yucheng, Wang, Ninglin, Li, Xiuxian, Chen, Peiqi, Huang, Lingxuan, Cai, Zhikuang, Zhou, Bo

Année:

2018

Langue:

english

Fichier:

PDF, 1.50 MB

english, 2018

5

[IEEE 2019 IEEE International Test Conference in Asia (ITC-Asia) - Tokyo, Japan (2019.9.3-2019.9.5)] 2019 IEEE International Test Conference in Asia (ITC-Asia) - A Novel BIST Algorithm for Low-Voltage SRAM

Cai, Zhikuang, Wang, Ying, Liu, Shihuan, Lv, Kai, Wang, Zixuan

Année:

2019

Langue:

english

Fichier:

PDF, 694 KB

english, 2019

6

[IEEE 2010 2nd International Conference on Computer Engineering and Technology - Chengdu, China (2010.04.16-2010.04.18)] 2010 2nd International Conference on Computer Engineering and Technology - Low cost Design-for-Testability features for System-on-Chip: Case study

Zhikuang Cai,, Kai Huang,, Jun Yang,

Année:

2010

Langue:

english

Fichier:

PDF, 181 KB

english, 2010

7

[IEEE 2010 Second International Conference on Computer Research and Development - Kuala Lumpur, Malaysia (2010.05.7-2010.05.10)] 2010 Second International Conference on Computer Research and Development - A Harmonic-Free and Fast-Locking Delay-Locked Loop Adopting a Resettable Delay Line

Huang, Kai, Cai, Zhikuang, Yang, Jun

Année:

2010

Langue:

english

Fichier:

PDF, 299 KB

english, 2010

8

[Institution of Engineering and Technology International Conference on Automatic Control and Artificial Intelligence (ACAI 2012) - Xiamen, China (3-5 March 2012)] International Conference on Automatic Control and Artificial Intelligence (ACAI 2012) - Highest frequency optimization of VLSI by a novel clock skew scheduling scheme

Kai Huang,, Zhikuang Cai,

Année:

2012

Langue:

english

Fichier:

PDF, 118 KB

english, 2012

9

A wide-range and ultra fast-locking all-digital SAR DLL without harmonic-locking

Cai, Zhikuang, Xu, Tailong, Sun, Haiyan, Shi, Longxing

Journal:

IEICE Electronics Express

Année:

2013

Langue:

english

Fichier:

PDF, 2.39 MB

english, 2013

10

Quasar signal estimation and compensation for data processing in VLBI receiver

Tang, Jifei, Meng, Qiao, Lei, Yezi, Cai, Zhikuang

Journal:

IEICE Electronics Express

Année:

2014

Langue:

english

Fichier:

PDF, 4.19 MB

english, 2014

11

A 0.6 V passive mixer with high conversion gain in 65 nm CMOS process

Chen, Chao, Wu, Jianhui, Cai, Zhikuang

Journal:

IEICE Electronics Express

Année:

2015

Langue:

english

Fichier:

PDF, 1.54 MB

english, 2015

12

An optimized QFP structure for use in radio frequency multi-chip module applications

SUN, Haiyan, CAI, Zhikuang, WU, Jianhui, SHI, Longxing

Journal:

IEICE Electronics Express

Année:

2012

Langue:

english

Fichier:

PDF, 2.16 MB

english, 2012

13

On-chip long-term jitter measurement for PLL based on undersampling technique

Cai, Zhikuang, Xu, Haobo, Que, Shixuan, Shan, Weiwei, Yang, Jun

Journal:

IEICE Electronics Express

Année:

2013

Langue:

english

Fichier:

PDF, 2.12 MB

english, 2013

14

A low-cost built-in self-test for CP-PLL based on TDC

Xia, Lanhua, Wu, Jianhui, Cai, Zhikuang, Zhang, Meng, Ji, Xincun

Journal:

IEICE Electronics Express

Année:

2014

Langue:

english

Fichier:

PDF, 887 KB

english, 2014

15

A Harmonic-Free All Digital Delay-Locked Loop Using an Improved Fast-Locking Successive Approximation Register-Controlled Scheme

HUANG, Kai, CAI, Zhikuang, CHEN, Xin, SHI, Longxing

Journal:

IEICE Transactions on Electronics

Année:

2009

Langue:

english

Fichier:

PDF, 405 KB

english, 2009

16

[IEEE 2017 IEEE 12th International Conference on ASIC (ASICON) - Guiyang (2017.10.25-2017.10.28)] 2017 IEEE 12th International Conference on ASIC (ASICON) - A harmonic-free cell-based all-digital delay-locked loop for die-to-die clock synchronization of 3-D IC

Xu, Tailong, Xue, Feng, Cai, Zhikuang, Liu, Xinning, Meng, Shuo

Année:

2017

Langue:

english

Fichier:

PDF, 437 KB

english, 2017

17

A 2.4-GHz all-digital phase-locked loop with a pipeline-ΔΣ time-to-digital converter

Wang, Zixuan, Hu, Shanwen, Cai, Zhikuang, Zhou, Bo, Ji, Xincun, Wang, Rong, Guo, Yufeng

Journal:

IEICE Electronics Express

Année:

2017

Langue:

english

Fichier:

PDF, 2.64 MB

english, 2017

18

A 0.6V Temperature-stable CMOS Voltage Reference Circuit with Sub-threshold Voltage Compensation Technique

Cai, Zhikuang, Chen, Chao

Journal:

IEICE Electronics Express

Année:

2018

Langue:

english

Fichier:

PDF, 708 KB

english, 2018

19

An improved timing error prediction monitor for wide adaptive frequency scaling

Shan, Weiwei, Liu, Xinning, Lu, Minyi, Shao, Shuai, Cai, Zhikuang, Yang, Jun

Journal:

IEICE Electronics Express

Année:

2017

Langue:

english

Fichier:

PDF, 1.63 MB

english, 2017

20

An all-digital phase-locked loop with a PGTA-based TDC and a 0.6-V DCO

Wang, Zixuan, Ding, Hao, Xu, Hao, Zhang, Cong, Hu, Shanwen, Ji, Xincun, Xia, Xiaojuan, Cai, Zhikuang

Journal:

IEICE Electronics Express

Année:

2018

Langue:

english

Fichier:

PDF, 2.85 MB

english, 2018

21

[IEEE 2018 International Conference on Microwave and Millimeter Wave Technology (ICMMT) - Chengdu (2018.5.7-2018.5.11)] 2018 International Conference on Microwave and Millimeter Wave Technology (ICMMT) - Wideband Lumped-Element Quadrature Hybrid for Intermediate Frequency Applications

Wang, Qipeng, He, Sijie, Zhu, Yucheng, Wang, Ninglin, Li, Xiuxian, Chen, Peiqi, Huang, Lingxuan, Cai, Zhikuang, Zhou, Bo, Cheng, Chonghu

Année:

2018

Langue:

english

Fichier:

PDF, 1.52 MB

english, 2018

22

Design of a compact chip filter with two transmission zeros using 0.35 μm GaAs HBT

Hu, Shanwen, Xu, Kaikai, Hu, Yunqing, Wu, Kejun, Qian, Jinchao, Gao, Yiting, Song, Dingzhou, Wang, Zixuan, Zhou, Bo, Cai, Zhikuang, Guo, Yufeng

Journal:

Microelectronics Journal

Année:

2020

Langue:

english

Fichier:

PDF, 1.78 MB

english, 2020

23

Design of a compact chip filter with two transmission zeros using 0.35 μm GaAs HBT

Hu, Shanwen, Xu, Kaikai, Hu, Yunqing, Wu, Kejun, Qian, Jinchao, Gao, Yiting, Song, Dingzhou, Wang, Zixuan, Zhou, Bo, Cai, Zhikuang, Guo, Yufeng

Journal:

Microelectronics Journal

Année:

2020

Fichier:

PDF, 1.78 MB

2020

24

A 0.5~0.7 V LC Digitally Controlled Oscillator Based on a Multi-Stage Capacitance Shrinking Technique

Wang, Zixuan, Wu, Hongyang, Wang, Xin, Shi, Mingmin, Hu, Shanwen, Guo, Yufeng, Cai, Zhikuang

Journal:

Année:

2019

Fichier:

PDF, 6.40 MB

2019

25

Built-in jitter measurement circuit for PLL based on variable vernier delay line

Cai, Zhikuang, Xu, Haobo, Hu, Shanwen, Yang, Jun

Journal:

IEICE Electronics Express

Année:

2017

Fichier:

PDF, 2.78 MB

2017

26

A self-refereed design-for-test structure of CP-PLL for on-chip jitter measurement

Xia, Lanhua, Wu, Jianhui, Cai, Zhikuang

Journal:

IEICE Electronics Express

Année:

2018

Fichier:

PDF, 2.74 MB

2018

27

[IEEE 2019 20th International Conference on Electronic Packaging Technology(ICEPT) - Hong Kong, China (2019.8.12-2019.8.15)] 2019 20th International Conference on Electronic Packaging Technology(ICEPT) - Optimal Design of Thermal Characteristics Based on Orthogonal Experimental Design Method

Qi, Zhang, Zhikuang, Cai, Binbin, Xu, Zixuan, Wang, Yufeng, Guo, Haiyan, Sun

Année:

2019

Fichier:

PDF, 3.40 MB

2019